Power supply should meet the needs of high power density, small area and low consumption for advanced devices [15,16]. Compared with traditional switched-inductor DC-DC converter [14], SC DC-DC converter can be easily integrated on a chip [1]. It also avoids electromagnetic interference (EMI). Both these advantages raise attentions of researcher to SC DC-DC converter.[4,5]. There are capacitance modulation and switching frequency modulation for output regulation at present [6,8], [9]. A digital capacitance modulation is proposed to regulate output voltage [6], but the lack of capacitance limits the simultaneous 100% capacitance utilization, so the power density of the converter decreases naturally. The switching frequency modulation can be divided into the digital modulation and the analog modulation. The digital switching frequency modulation achieves fast transient response, but it has the disadvantages of low precision and large output voltage ripple for output regulation [8]. An analog switching frequency control strategy is proposed to guarantee high precision and small output voltage ripple. [9], but due to the control losses, the power efficiency decreases rapidly at light load, the control strategy also has a problem that no detailed system stability analysis of the converter particularly the SC array is given. In order to solve the problem, this paper proposes an optimal dual mode controller instead of a single control strategy to regulate output voltage. Another issue aims at reducing the switching losses to improve power efficiency. A conversion ratio only gains high power efficiency in a narrow input/output voltage range [2,3]. A reconfigurable SC array is implemented for a wide voltage range [10,11,13,17,20,21], however, the dominant switching losses becomes the main factor decreasing power efficiency. The switch width of SC array is usually determined by the maximum switching frequency, but the optimal switch width of the SC array varies with variation of the switching frequency, so the switching losses can be reduced by adjusting switch width at low switching frequency. As is discussed above, this paper proposes a dual mode step-down SC DC-DC converter with four conversion ratios. PFM is adopted at heavy load while burst mode is adopted at light load. PFM achieves small output voltage ripple and high precision, a detailed system stability analysis is introduced. To overcome the problems of the lower power efficiency and the decreasing Gain bandwidth product (GBW) of PFM operation at light load, burst mode is adopted to reduce the control losses and implement fast transient response. To reduce switching losses over entire load range, ASWM is proposed to optimize switch width with the variation of the switching frequency. The rest of the paper is organized as follows. Section 2 is the detailed introduction of the proposed SC DC-DC converter, including operating principle of dual mode control strategy, and ASWM, a detailed system stability analysis is introduced at PFM operation. Section 3 describes the circuit implementation in detail. The measured results of the proposed converter in 0.18 μm CMOS technology are shown in section 4. Section 5 concludes the paper.