In recent years, a numerous Multi-Level Inverter (MLI) topologies are proposed with reduced number of switches and control complexity. An Impedance source based MLI structure with ability of additional boost is proposed in this work. The proposed topology requires one source, one impedance network and reduced number of switches when compared to recently reported inverter literature. Due to Selfvoltage Balancing circuit (SBC), the fixed boost of 1.5 times the input and equal voltage across all the capacitors are achieved. An additional boost is obtained by placing impedance network between input source and SBC. The proposed Inverter is compared with existing topologies with respect to a number of sources, number of impedance networks, control switches, voltage balancing and boost capability. A simple level shifted based sinusoidal pulse width modulation technique is adopted for generating gate pulses. Further theoretical analysis and computer aided simulation results are validated with the experimental results.
۲۰۱۸ Karabuk University. Publishing services by Elsevier B.V. This is an open access article under the CC BY-NC-ND license (http://creativecommons.org/licenses/by-nc-nd/4.0/).

Introduction

Novel MLI topology has significant advancement in the field of power electronics, because of numerous advantages over conventional inverters. The conventional two level inverters are facing difficulty in meeting present scenario. The most popular conventional MLI structures are: Diode Clamped MLI (DCMLI), Flying Capacitor MLI (FCMLI) and Cascaded H Bridge MLI (CHMLI) [1–۳]. In DCMLI, (n-1) capacitors are used as potential dividers, the voltage unbalancing across these capacitors is a serious concern. Additionally, it requires (n-1)(n-2) clamping diodes. For FCMLI, (n-1)(n-2)/2 bulky capacitors are required. In CHMLI, separate sources are required for each H Bridge and each bridge produces three levels. These H Bridges are connected in series for generating the required number of levels in output voltage where n is number of levels in output waveform. A numerous MLI topologies are proposed to address the drawbacks of conventional MLI’s. In recent years the focus is made on: Increasing the number of levels in output with asymmetrical voltage sources as reported in [4–۶]. These inverters require more than one source with different voltage magnitudes. To obtain different voltages, different turn’s ratio transformers are used. The asymmetrical MLI requires DC sources with different magnitudes and switches of different rating. A few topologies are proposed by reducing the number of switches [4,7–۹] and sources [10–۱۲]. To reduce the number of input sources, series connected capacitors are used as a potential dividers. To achieve balanced voltage across all DC-link capacitors, a separate feedback circuit is used [13,14]. Inverter circuit will become complex due to this approach. With the conventional or transformer based MLI’s [15–۱۸], in case of any shoot through or miss gating, entire circuit will get damaged. The cost and losses increases due to transformer present in the circuit. In aforementioned topologies, the maximum available voltage is limited by the input or DC link voltage. In applications like: Photovoltaic system, Electrical vehicles, Dynamic voltage restorer, etc. requires both boost and buck operations [19]. To meet this normally DC-DC converter or Z Source Inverter (ZSI) is used. If a DC-DC converter or Z Source network is integrated with MLI, then separate DC-DC converter or Z network is required across each source [20].