| This special issue is focused on Computer Architecture and High Performance Computing. It also includes extended papers presented at SBAC-PAD 2016, 28th International Symposium on Computer Architecture and High Performance Computing, which took place in Los Angeles, USA, from October 26–28, 2016. All submitted papers to this special issue were rigorously reviewed by at least three expert reviewers, and further carefully evaluated by the guest editors. After the review process, only 9 papers were finally accepted for publication. Below, we provide an overview of the papers appearing in this volume. In ‘‘Janus: Diagnostics and Reconfiguration of Data Parallel Programs’’, the authors present the design an implementation of Janus, a tool that automates the reconfiguration of Spark applications. It leverages logs from previous executions as input, enforces configurable adjustment policies over the collected statistics and makes its decisions taking into account communication behaviors specific of the application evaluated, showing gains of up to 1.9x in the scenarios considered. The work entitled ‘‘An Experimental Evaluation of a Parallel Simulated Annealing Approach for the 0–1 Multidimensional Knapsack Problem’’ focuses on the proposal of a parallel simulated annealing algorithm (SA) using GPGPU. The results achieved by the parallel SA were compared to other reference works and showed that GPGPU is effective on the task of obtaining better quality solutions in reduced execution time when compared to sequential programs. In ‘‘Aspen-Based Performance and Energy Modeling Frameworks’’, the authors propose and evaluate two energy estimation techniques: ACEE (Algorithmic and Categorical Energy Estimation), which uses a combination of analytical and empirical modeling techniques; and AEEM (Aspen’s Embedded Energy Estimation), a system-level analytical energy estimation technique, that incorporate Aspen domain specific language for performance modeling. In ‘‘MR-Advisor: A Comprehensive Tuning, Profiling, and Prediction Tool for MapReduce Execution Frameworks on HPC Clusters’’, the MR-Advisor tool is proposed and described in detail. It also presents the MR-Advisor generalization to provide performance optimizations for Hadoop, Spark, and RDMA-enhanced Hadoop MapReduce designs over different file systems such as HDFS, Lustre, and Tachyon. |