مقاله انگلیسی رایگان در مورد بهینه سازی حرارتی دستگاه الکترونیکی با الگوریتم کلونی مورچه – IEEE 2018

The thermal stress of the system will be enlarged with the increase of heat flux in the circuit board [1], resulting in a significant increase of the circuit failure rate. However, electronic engineers usually neglect the steady-state temperature variety caused by the placement of components or just simply separate the chips with high power consumption. In addition, we can also use computer simulation software to calculate the temperature, such as Flotherm [2]. However, it’s difficult to deal with the overlapping region when the number of components is significant and the range of optimization are relatively large. In order to overcome these questions, many layout optimization algorithms have been researched which can be divided into optimization algorithm and heuristic algorithm. The optimization algorithms take advantage of operational research knowledge and can get the optimal solution of the layout accurately. However, when the PCB area is large, the time complexity is also high. The heuristic algorithm can discover the sub optimal solution of the feasible solution space by guiding rules under the acceptable cost of the system. In a complex scene, heuristic algorithms are more suitable for engineering applications such as genetic algorithms [3, 4], simulated annealing algorithms [5] and ant colony algorithms [6, 7]. Based on the principle of heuristic optimization, many PCB layout optimization methods have been proposed. Bogula, Chermoshencev and Suzdaltsev [8] is devoted to the development and study of evolutionary algorithms for solving multi-objective problems of high-speed digital electronic PCB design. Ismail and Yusof [9, 10] choose the Weighted-sum approach to consider the temperature and the inter-connection between each component, but perhaps some devices not only have high power consume but also should be put the central position. Alexandridis, Paizis, Chondrodima and Stogiannos [11] developed an approach dealing with the continuous nature placement in PCB thermal design based on the particle swarm optimization. The above algorithms can solve the device layout problem in a certain scene, but does not consider the existence of a priori layout constraints between the devices on the printed circuit board. In this paper, we propose a new partial grid model method and use the ant colony algorithm to optimize the layout of devices. For the actual requirements of the component, we place them in the designated area. Some components have a “package” relationship, which need to be placed in the adjacent area. Other components without specific location restrictions can be placed over a large area. In addition, in order to avoid the local optimal solution, this paper use the ant colony method with classified compensation. Finally, the Flotherm simulation experiments show that the optimized device placement can effectively reduce the maximum temperature and average temperature on the printed circuit board, which proves the validity of our algorithm.